Build Project: Dewster's D-Lev Digital Theremin

I'm just really jazzed to watch this come to life. I've been following this thread for what seems like years.  Pretty much 99% of what is discuss is complete gibberish to me and I was actually not able to even tell how far this design has progressed.  Your build is stunning.  The exposed coils are, to me, as important aesthetically as functionally.  The sounds bits I've heard are quite new but mature sounding.  I play the EPro exclusively and dread the day I flip the power switch and nothing happens.  So I following your progress with great interest.  Thanks.

Awesome professionally looking build!

I'm just really jazzed to watch this come to life. I've been following this thread for what seems like years.  Pretty much 99% of what is discuss is complete gibberish to me and I was actually not able to even tell how far this design has progressed.  Your build is stunning.  The exposed coils are, to me, as important aesthetically as functionally.  The sounds bits I've heard are quite new but mature sounding.  I play the EPro exclusively and dread the day I flip the power switch and nothing happens.  So I following your progress with great interest.  Thanks - johnthom

You're welcome!  I possibly have a little advantage in that only about 90% of what Dewster talks about is complete gibberish to me (and I've been an EE since 1980, but in a nearly opposite specialty). But still, many times in our email communications I just have to nod approvingly and go along with it.  Fortunately when I claim to need hand-holding through a procedure, he documents the steps in detail, and he misses nothing.  That's why I want to trim the conversational chatter from our communications and post verbatim the crucial steps of his procedures.

The D-Lev has just about killed any interest that I have had in acquiring an EW Pro now since it has virtually unlimited voices (it's basically a synth too), register switching, and an adjustable size/linearity pitch field that anyone can feel comfortable with, even if you are coming from an RCA. My goal when first contacting Dewster many months ago was primarily to get my hands on one of his prototypes.  When winter came I finally had the time to focus on this project and it has turned out to be better than I ever expected.  We are currently engaged in many back-and-forth discussions of features and tweaks, and Dewster is an absolute genius with this stuff. For my part I provide feedback and ideas, more from a "wishlist" standpoint rather than trying to tell him how to do anything, and of course I like to build things and try new design approaches.  I hope that doing this will help to provide some additional feedback for Dewster and at the same time  provide a bridge for others who may want to build one for themselves.  It is a remarkably easy project as theremins go, and there are many ways to do it since there are very few critical sections.

Re: fear of EWPro failure... from what I can gather here I don't know of anyone other than Thierry that really has the hands-on experience to troubleshoot and fine-tune the RF sections of the Pro. But I would suggest that, as is the case with just about any piece of electronic gear, there are many lesser problems that could be triaged in a non-intrusive manner with proper test gear, and in some cases even repaired without going the rather expensive route of sending it to France.  If you ever get into that "wake up dead" situation, consider any local options (including contacting me if you wish) that may be willing to help to at least localize the problem for you.

"I possibly have a little advantage in that only about 90% of what Dewster talks about is complete gibberish to me"

Pitt, your skills at construction are very nicely done!

Following the research of dewster for almost ten years, all I ever asked him, can you demonstrate a theremin sound that is musical? I do wish him success but the theremin for me is all about a unique recognizable sound.

Happy New Year to all, I expect great theremin success in 2019 as I hear the whispers from an age gone by.

Christopher   

D-Lev Schematics as of 2018-12-26

NOTE:  These schematics will be updated periodically and may still contain minor errors at this time.  If you are considering creating your own layouts it would be wise to cross check them against Dewster's original sketches.

These schematics were created in Diptrace v2.4.  A free, fully-functional (but 300-pin-limited) version of Diptrace v3.3  for non-profit use only is available here. It also has pattern and component creation, layout, and autorouting capability.

Layouts are not available as they have not been updated and the form-factor may change from the prototype versions.

PDFs of the schematics are also listed if you only wish to view them.

Diptrace Schematic Files:

D-Lev MAIN pcb
D-Lev ANTENNA pcb
D-Lev TUNER DRIVER pcb
D-Lev TUNER LED pcb
D-Lev ENCODER pcb

PDFs

D-Lev MAIN pcb PDF
D-Lev ANTENNA pcb PDF
D-Lev TUNER DRIVER pcb PDF
D-Lev TUNER LED pcb PDF
D-Lev ENCODER pcb PDF

This is just a quick preliminary dump of the initial steps.  To keep keep all of the procedures in one location, this post will be edited periodically to keep it up to date.

Note: I believe that Dewster (Eric) has mentioned that he may at some time offer sets of pre-programmed FPGA boards and EEPROMs for those wishing to get a jump start on building their own D-Levs.  But if you do prefer to perform all of the programming yourself, the sequence outlined below may look a little intense, but once you get the hang of it updating the FPGA and EEPROM takes less than five minutes.  The advantage of doing all of this yourself from the beginning is that you will be poised and prepared to handle any future updates without the fear of attempting it for the first time on your pre-programmed devices.I should note that a streamlined procedure will be added here later that would allow skipping some of the compilation steps prior to pumping the FPGA board.

Quick Preview and Tips...  D-Lev Programming for Dummies

1) Two components in the D-Lev need to be programmed: the FPGA demo board, and the EEPROM.

2) The FPGA demo board is programmed using the Intel Quartus II software linked below.  A USB Blaster dongle (link elsewhere) acts as the interface between your computer's USB port and the JTAG connector on the FPGA board. The blaster connects to the board through a ribbon cable supplied with the USB Blaster.  During programming the FPGA board must be powered on, either by using a wall-wart 5v adapter (not supplied with the demo board) or by applying +5v to one of the labeled pins. The FPGA board may be programmed while inserted into the theremin circuit or while removed.

3) Many of the generic USB Blaster clones available on eBay will use drivers located in a folder located in the Quartus II installation. This site has a nice overview of driver installation procedures for various operating systems.  I was never able to make my particular Blaster work on Windows XP, although it did end up working on Window 7.  Be aware that you may need to try different drivers,  USB ports, computers, or even blasters to find something that works.

Dewster and I each recently bought this Blaster from eBay for $7.99 , and he has had success using it with the driver that comes with the Quartus II installation and which is found at C:\altera\10.1sp1\quartus\drivers\usb-blaster\.

4)  As Dewster points out, the theremin should be functional after the FPGA is programmed, even prior to the EEPROM programming.

5)  The EEPROM is programmed using a free terminal emulator program such as Tera Term (Putty is another of several options) in serial mode.  A USB-to-UART adapter (link elsewhere) acts as the interface between your computer's USB port and the UART pins on the theremin's MAIN board.  These UART pins and the EEPROM both connect directly to the FPGA board through the MAIN board, so the programming path is computer-->USB/UART adapter-->FPGA board-->EEPROM.

After the EEPROM is initially programmed, there will be another one-time operation that will initialize all of the preset slots.  Please note that at this time there is no simple loading process for a library of "factory" presets, partly because only a few presets (some strings and vocals) have been created thus far.  For now these can be manually entered and stored.

6) You may also have to experiment with different drivers if you use one of the clone USB-UART adapters.  The particular chip used inside might be genuine, defaced, or a fake with genuine-appearing markings, so it may be hard to guarantee that any device received will be exactly the same as that recommended here.

7) Most USB-UART adapters will connect to the MAIN board 4-pin connector as follows:  Black wire (GND) to Pin GND, Green wire (TXD) to Pin RXD on board, and White wire (RXD) to Pin TXD on board.  The Red wire (+5v) may be left unconnected or connected as long as there is no jumper on the 2-pin header on the MAIN board labeled "UART +5v Disconnect".  Note that the transmit data goes to receive on board, and so on.

NOTE: More details including some troubleshooting procedures will be sorted out and added later.

PROCEDURE 1:  FPGA Pump Instructions (for Quartus II v10.1sp1)

Setup:
1. Unzip the latest D-Lev SV (HIVE_SV_2018-12-07_v13.04.zip) and stick it somewhere.
2. Install & fire up Quartus II v10.1sp1.
3. Tools | Options... | General | "Default  file location" (at bottom) navigate using the "..." button to  the location of the D-Lev SV code.
4. Tools | Options... | General | Internet Connectivity | uncheck all boxes (this makes Quartus start up faster).
5. Plug in USB programming dongle and install drivers (if necessary).

Compile:
1. Fire up Quartus.
2. File | Open Project...
3. Navigate to the D-Lev SV directory "Q10.1sp1" and open the file "ep4ce6e22c8_demo_board.qpf".
4. Processing | Start Compilation... (will take a few minutes and should generate 5 warnings & no errors).
5. Table of Contents (window pane) | TimeQuest Timing Analyzer | Slow 1200mV 85C Model | Fmax Summary | pll_core s/b > 180MHz.
6. If pll_core clock is below 180MHz change the seed and recompile: Assignments | Settings | Fitter Settings | Seed | Apply | OK | step 4.
7. File | Convert Programming Files... | Open Conversion Setup Data... | open file "ep4ce6e22c8_demo_board.cof" | Generate | Close.

FPGA Serial Configuration Device Programming:
The FPGA configurator pump is the weakest point in the chain and therefore the most difficult to explain.  Even if the USB programming dongle is plugged in 24/7, Quartus will "forget" it now and then.  And the initial JTAG chain setup can be a pain as the auto detect process for some reason can't auto detect the exact serial configurator device, so you have to tell it (EPCS16).  But once you get past the initial pump successfully then the other settings somehow stick pretty well.  It's controlled by a *.cdf file in the Q10.1sp1 directory.

1. Fire up Quartus and open the project file.  Connect the programming dongle to the FPGA board either before or after this (see warning below).
2. Tools | Programmer | if you don't see the "USB-Blaster" next to the "Hardware Setup" button: Hardware Setup... | USB-Blaster (double click) | Close.
3. (A miracle occurs) Do whatever you have to do to make the programmer dialog look like this:

4. Click the "Start" button.  If you see "Failed" in the "Progress" bar: close & open the programmer and try again (!).
5. Power cycle the FPGA board to pump the FPGA itself with the new configurator load.

Warning: If you are using a genuine Altera USB-Blaster programming dongle, you must be very careful how you connect it to the FPGA programming header! Specifically, you must avoid situations where the dongle is connected to the FPGA board but disconnected from USB (powered-down) while the FPGA board is powered-up.  (The opposite - dongle powered-up and FPGA board powered-down - is fine.)  I have no experience with other dongles, but it wouldn't hurt to be careful here regardless.

Default Hive SW Load
The FPGA load has a default, fully functional D-Lev software load for the Hive processor "built-in" to the block RAM at the time the FPGA gets pumped by the serial configurator device.  So you should get a working D-Lev Theremin even if the D-Lev EEPROM isn't hooked up, or if the EEPROM load is corrupt.  The boot portion of the FPGA default load wakes up and checks the EEPROM SW load CRC, and if the CRC is good it overwrites the FPGA default SW load with the EEPROM SW load and starts things up (there is a bit more delay added to let the oscillators settle and auto-cal, boot takes ~1 second).  You can force a default load by depressing encoder 7 during powering up.
Default Hive SW Load Updating
The default FPGA D-Lev load is contained in these four files: "hive_0.mif" "hive_1.mif" "hive_2.mif" "hive_3.mif" which are automatically generated at the time of HAL assembly (to be addressed in a separate post).  To update the default FPGA D-Lev load without having to recompile the FPGA:
1. Copy "hive_0.mif" "hive_1.mif" "hive_2.mif" "hive_3.mif" from the Hive simulator directory to the Q10.1sp1 directory (overwrite the files there).
2. Fire up Quartus and open the project file.
3. Processing | Update Memory Initialization File.
4. Processing | Start | Start Assembler.
5. Reprogram the FPGA serial configurator & power cycle.

Hive Simulator Setup:
1. Unzip all files (the latest archive is "2018-12-07.zip") to a folder and make a desktop shortcut to "hive_sim.exe".  (I don't normally archive the EXE file in the zip file, but I did so for this latest one.)
2. Right click on the shortcut and click the "Options" tab, set "Command history" "Buffer size" to 48. 
3. Click the "Font" tab and pick 8x12 raster fonts. 
4. Click the "Layout" tab and set both "Screen buffer size" and "Window size" to 128 x 48. 
5. Apply and close, then run the shortcut to see if everything is OK.  You should see successful assembly results, then the simulation screen.

Tera Term Setup:
1. Install Tera Term, make a desktop shortcut.
2. Setup | Serial Port |
- Baud rate: 230400
- Data: 8 bit
- Parity: none
- Stop bits: 1
- Flow control: none
3. Setup | Terminal |
- New-line Recieve: AUTO
- New-line Transmit: CR
- Local echo: none

You can set the Tera Term baud rate and port defaults via the shortcut "Target": "C:\Program Files\teraterm\ttermpro.exe" /BAUD=230400 /C=5
Serial Port Test

1. Connect the serial port to the FPGA board, start Tera Term.
2. Press the enter key.  This should produce a question mark (return is an unrecognized control character) followed by greater than (the ready prompt).
3. Type "0 9 rr " without the quotes or return, and with the final space.  This should list the contents of the first 10 internal Hive registers.

Assembling & Uploading to EEPROM
The Hive simulator automatically assembles HAL (Hive Assembly Language) code when it is opened in the simulator.  This produces the Tera Term script file "hive.ttl" which can be uploaded to the Hive processor on the FPGA demo board via UART serial port, in order to program the D-Lev EEPROM.

1. Start and close the simulator to assemble (the default file is "theremin.hal").
2. Start Tera Term.
3. Control | Macro | navigate to and select "hive.ttl" | Open.
4. Stuff should stream by for ~15 seconds, followed by a CRC check producing "debb20e3", followed by "BL" which indicates successful boot via EEPROM.  If it hangs or stalls out at any point just close Tera Term, reopen it, and do steps 3 & 4 again (Tera Term seems to get tired now and then).

To be continued...

If it seems that there is a lull in D-Lev activity here, it may be for a reason.  For my part I am pretty much fixated on playing with my prototype - it's a difficult toy to put down.  I can't speak for Eric, but I hope he is taking a much needed break (though I doubt it).  In the last couple of weeks he has added more features and fed me more software updates than I was able to keep up with for a while, but here are some of the latest changes:

1) added both a menu-based and a hard-wire MUTE function.

2) greatly improved the volume response and helped me figure out how to set it up to behave like the Subscope theremin, which is my Gold Standard.

3) added a a new PREVIEW screen to the menu.  This is a sophisticated pitch preview (PP) monitor with virtually all of the features that have been discussed previously and that I was personally hoping for.  Activating the PP in the menu diverts the second audio channel of the toslink optical digital-to-analog converter for use as the monitor output.  The PP controls available to the user are similar to several parameters used on other menus and currently include:

"harm"  changes PP timbre in 64 steps from a sine wave to a bright, harmonic rich sawtooth for comfortable audibility.  A harmonically-rich setting is important for identifying low pitches, and the ability to adjust the PP timbre independently from the main audio helps to keep them separated, particularly if you use a dedicated speaker near your head for the PP monitor signal rather than an earpiece.

"pmod" allows pitch to modulate the PP monitor volume, and is generally used in an inverse relationship.  This is a very important feature for keeping the perceived loudness of the monitor tone at an even level from low to high pitches.  Without this feature, a PP level set to be barely audible at lower pitches will be screaming in your ear at mid- and high pitches.

"vmod" allows the left hand volume to modulate the PP monitor level in either a positive or negative direction.  When set to zero, the PP level will be constant.  For other settings, the PP level will rise or fall with the left hand movement, allowing the preview tone to fade in as the main audio is cut off, or vice versa.

"oct" allows the PP monitor tone to be raised or lowered by octaves.  One useful application is for when you are playing bass lines; raising the PP monitor up an octave enhances the ability to identify pitch.

"pprev". Set to "0" the PP is off and the second audio channel is routed to main audio.  Set to "1", the secondary channel is routed to PP.

"level" is simply a volume control for the monitor signal.

All of these pitch preview parameters are saved on a per-preset basis rather than globally.  This is important because comfortable level and timbre settings for hearing the PP monitor audio will vary with the timbre of the main audio.

I've been playing with the D-Lev voices while monitoring the audio output on scope/spectrum analyzer application, and I decided to set up a camcorder to show what two of the presets look like. I need to boost the channel gain for the oscilloscope, but the spectrum analyzer shows up just fine.  If you watch as the harmonics move around for various pitches you can start to get an idea of the overall response defined by the fixed formant filters.  This is most noticeable on White Christmas with the male voice.

The left channel audio is direct from the theremin, and the right has a little reverb.  No other audio processing or pitch correction was used.

Happy New Year!

I really like what I'm hearing (nice playing by the way).  The vocal formant sounds excellent, much better than my experience with the Electro-Harmonix box.  There's some real genius behind this design that I can truly appreciate now that I can hear it played well (and without accompaniment).

If you or anyone else decides to produce these theremins I would be very interested in purchasing one as this is way beyond my skill level to attempt.

Thanks for sharing.

"I really like what I'm hearing (nice playing by the way).  The vocal formant sounds excellent, much better than my experience with the Electro-Harmonix box.  There's some real genius behind this design that I can truly appreciate now that I can hear it played well (and without accompaniment).

If you or anyone else decides to produce these theremins I would be very interested in purchasing one as this is way beyond my skill level to attempt.

Thanks for sharing." -johnthom

Thanks for your comments.

The particular vocal sound in the video is just the tip of the iceberg.  I think you could spend weeks/months just creating new vocal sounds with different male and female characteristics.  The EHX talking machine has one or two theremin-useful vocals that appear to use 4 formant filters, and as near as I can tell the formants are fixed and unable to be modified with louder or higher pitch notes.  On the other hand, the D-Lev has 12 dedicated formant filters that can be set to any frequency and relative amplitude, and the resonances are adjustable for each of the 4 groups of 3 filters.  In addition, the first bank of 3 formants can be modulated up or down in frequency by pitch or volume or both, which gives a powerful  means of opening up the vocal sound realistically.  All settings can be saved on a per-preset basis.

On top of the the dedicated formants, there are oscillator and noise filters, an inharmonic resonator, and now the variable even/odd harmonic mix that in itself can add thousands of new variations.  This is getting into serious synthesizer territory. And the vocals are just one small part of the overall sound capabilities. 

I can't speak for Eric, but as I said earlier I'm pretty sure that he will offer some path for getting one of these in hand in the very near future.  Eric is furiously adding new features as we work through some issues on the forum or via email, and I think it's more a matter of getting the basic architecture stable so that a library of representative presets can be supplied to users. I have no stake in this, but I can't hide that I am pretty enthusiastic about the whole thing.  I think it will be worth your wait.

Roger