Let's Design and Build a (mostly) Digital Theremin!

"...one 470pF between oscillator and equalizing inductance, and one 470pF between antenna and equalizing inductance - and one can usually reduce these to 220pF each, which marginally reduces sensitivity, but further reduces LF noise by a few db, and also seems to slightly improve linearity."  - FredM

It does seem to improve linearity close to the antenna, which makes sense and is quite interesting.

Thoughts on linearity: my prototype is actually quite linear when the null position is adjusted to give octave wide open/closed hand gestures.  This is too sensitive to really play.  The way I was approaching the whole thing was to move the null point out farther and then try to linearize the near field with a polynomial.  I think I should instead set the null for linear response and then apply a function that reduces sensitivity equally over the entire range.  Taking the square root would give a perfect fifth (1/2 octave) response open/closed hand gestures, and there appears to be a method of calculating them that doesn't require much in the way of hardware:

http://161.200.126.13/MyWebsite/Publications/0012.pdf

Dewster,

That is a really interesting article - and so fast and simple! ..

I have been playing with some mixed-signal stuff in the PSoC 3 (Am working on reducing the complexity of my additive synthesis engine - this involved analogue multiplication of the difference frequency to provide sine wave harmonics which could be mixed to taste) And am having problems squeezing the required 12 harmonics and their level / phase controlling stuff into the chip - so I am looking at mixed-signal now.

Can you advise on a low cost FPGA DK ? Ideally I want something complete with basic development environment - the ability to enter schematic and verilog, and all the functions to compile / fit these.

I am familiar with the Lattice Mach 4 parts (and I love their development environment - but the registration is a pain in the butt ) - but these are becoming obsolete I believe ..

What I want is either FPGA's available as PLCC (so they can be put into a low cost socket which comes out as through hole on 0.1" pitch) or one which has a small development board available cheaply which could be programmed and supplied inside the theremin.

I really want to avoid SMD parts if at all possible - unless I can buy these already fitted to a low cost (<£50) board. I am developing the PSoC stuff on my large DK, but configuring the IO to run on the small (£35) "first touch" boards which can plug into a motherboard.

I would be grateful for any advice you can give.

Fred.

"Can you advise on a low cost FPGA DK"  - FredM

$55 Spartan-3A XuLA-200: http://www.xess.com/prods/prod048.php

$26 MachXO breakout board (if you don't need too much logic): http://www.latticesemi.com/products/developmenthardware/developmentkits/machxobreakoutboard.cfm

$70 Spartan-3E board: http://www.aliexpress.com/item/Hot-sale-XILINX-FPGA-board-Spartan-3E-XC3250ETQG144/607613871.html

$28 Cyclone board: http://www.wayengineer.com/index.php?main_page=product_info&cPath=50_55&products_id=153&zenid=eb0046735c459b88f51ab2fba0039baa

$19 Cyclone board: http://www.wayengineer.com/index.php?main_page=product_info&cPath=50_55&products_id=161

I'm kind of partial to Xilinx, though I've used lots of Altera too.  Where I used to work we almost always had a MachXO on the board for glue and misc stuff that used to go in CPLDs (the built-in configuration Flash is convenient, the part comes alive milliseconds after power is applied, and field upgrading via the host processor is simple).

I haven't used the free ISE WebPACK tool from Xilinx (I use an older full version) but it looks like it targets most of their devices that hobbyists would be interested in.  For simulation I use an old version of Quartus II (v9) but I'm kind of an idiot that way (cut my teeth in Max+II, what a wonderful tool for the time).  There is a free version of Quartus II available on-line as well.

I'd advise you to avoid schematic entry because it is not portable.  If you are just starting out with HDLs I'd recommend verilog.  I find VHDL to be overly verbose.

If you are interested in generating sin & cos at the same time, an integer based digital filter with infinite Q will rather amazingly ring forever with a constant amplitude, even though there is LSB truncation.  It's just two integrators with a sign inversion and feedback, and making sure there is only one delay in the loop.

Thanks Dewster - that XO breakout board in particular looks interesting - probably all I need if I go this route.

"I'd advise you to avoid schematic entry because it is not portable.  If you are just starting out with HDLs I'd recommend verilog.  I find VHDL to be overly verbose."

Yeah - ive been here before - many years ago.. I think in schematics.. Oh, for state machines and sequential operations I can code in whatever (have used ABEL and VHDL, and played a little with Verilog) - but even if I end up with VHDL or Verilog, I do most at schematic level and take the output code from the compiler/fitter, and "re-package" this as VHDL or Verilog if I need portability..

For me, schematic entry is essential. I will probably go the Lattice route because I am familiar with their ispLever software.

Fortunately the sin functions are quite simple.. I have filed a patent on my scheme - its a sort of analogue version of DDS which simultaneously outputs as many integer multiple sinewaves of the fundamental as the hardware can support, and allows phase shifting and level control of each of these sines.. I am looking at CPLD/FPGA with a view to emulating the analogue process using digital (LUT) as I should then be able to get about 16 harmonics from a single chip (albeit these would then each need to drive a DAC) (I do the wave mixing external to the chip as this gives far greater fidelity).

I am getting 12 harmonics from a PSoC 3, but have been forced to convert these to PWM in order to get them to the outside world - and its all getting a little messy..

Fred.

No hardware multipliers in the XO, and kind of cramped the minute you need to throw flops and LUTs at a problem. The $19 Cyclone 2 board looks like the deal to me.  Personally I'm on the lookout for a cheap Spartan6 board.

You could run an infinite Q filter at 100MHz and snag whatever sample you want at 48kHz, or put 1024 first quadrant sine samples in a 16kbit BRAM.  It would be kind of neat to have that Hammond sound emanating from a Theremin, but I think I'd do the mixing with a digital adder and multiplier.  You could generate all the harmonics in the world with a tiny FPGA connected to a 16 bit DAC.

" It would be kind of neat to have that Hammond sound emanating from a Theremin " - Dewster

LOL - We think alike! ;-)

The possibilities for additive synthesis are huge - and the theremin topology is ideally suited to it, because one is playing with high frequency signals having extremely small frequency variation - for example, with a 200kHz reference, the VFO only changes by about 5kHz.. about 2.5%.. Any PLL can lock to this.. All one needs to do to produce a 2nd harmonic is to multiply both reference and VFO by 2, and heterodyne the resultant frequencies (if ref = 200k, VFO = 201k, multiplying these gives 400k and 402k, difference = 2k)

One can continue this integer multiplication up as many times as one wants, and produce harmonics this way.. This was the basis for my last prototype (in fact, one doesnt need a PLL for each harmonic - for example one can get the 5th harmonic and 10th harmonic as square waves with equal M/S ratios by multiplying the reference and VFO frequencies by 20, then deviding these down by 2 and 4, and heterodyning these devided frequencies)

But I have found a far easier way of doing the above which does not use PLL multiplication, and which produces pure sine outputs. Its just a shame in a way that these schemes only work with a heterodyning system - in order to get it to work with other signals (voltage or MIDI control for example) one needs to effectively create a voltage/MIDI controlled theremin front-end. A lot of my effort has been devoted to doing this - The market for theremins is tiny - But I think that a VCO with additive synthesis would have a much bigger market in the Synth world - Increasing the volume of units I could sell is essential to bring the price down and make the product/s viable.

"The $19 Cyclone 2 board looks like the deal to me"

Thanks for that advice - I will certainly look at that more closely.. Do you have expierience with this part, and particularly - what is its development software / environment like? I need to factor in the learning curve and any costs for software etc.. If you have any first hand expierience with this I would be most interested in your opinion.. Otherwise I will just download anything I can find and read this.

Thanks for your help!

Fred.

Ouch! - I have just downloaded the free Altera web version of their Quartus II development software.. This is heavy stuff! - Makes the Mach4 and its ispLever software look like a piece of cake by comparison!

"Do you have expierience with this part, and particularly - what is its development software / environment like?"  - FredM

Altera and Xilinx both do smaller economy spins (Cyclone & Spartan) of their higher end fully featured expensive parts once they have aged a bit.  They tend to use older technology here (larger silicon feature size).  Xilinx has always had efficient distributed memory in their fabric, where the LUT can be used as a small async RAM.  Altera did this goofy thing with their earlier block RAMs, using the falling clock to do the write, which tended to bottleneck speeds.  Once you get to the huger parts, having a ton of transistors sitting there leaking can negatively impact your power budget, and Altera tends to use faster, and hence leakier transistors.

I don't have direct experience with Cyclone2, but I've developed in Stratix and several other earlier Altera FPGAs and CPLDs.  The 4kb block RAMs are kind of small (I prefer the 16kb that Xilinx uses) but there are many 18x18 multipliers to play with.  For any non-trivial DSP you really have to have multipliers, otherwise you'll be eating up your fabric doing slow iterative shifts and adds.  In your code multiplying can be as simple to implement as addition, though there are other features of the DSP block that you might be able to use more efficiently if you use proprietary directive constructs (the tool can help you do this, I tend to stay away from these as well).

The tools do take some acclimating to, but to me the real learning curve is digital design itself, partitioning designs to facilitate simulation, state machine and data path construction, finding efficient algorithms, etc.  I'm finally reaching the point where the functional blocks I design fit together simply and easily, which takes things to a higher level.  Quartus has a very nice simulator - most designers like and use Modelsim but I personally can't stand it, and it's terribly expensive.  But I do very much enjoy simulation, which I think is the central skill to have when it comes to developing in FPGAs.  Without simulation you're just shooting in the dark with even the simplest stuff.

Finally past the pitch linearity issue!  Woohoo!

Yesterday I simulated the square root function in Excel (http://www.mediafire.com/?v2bc4wp9fr36gwz if anyone wants to play with it) and wrote a verilog module for it.  This morning I debugged the module and stuck it in the prototype - WOW!  Now getting perfect fifth intervals with open / closed hand, and the noise is lower further out from the pitch antenna due to the attenuation.  I'm using one of the demo board switches to switch it in & out of the pitch path, will likely include this in the final design as it allows for fine playing (in) and large special effects type sweeps (out).

The general solution here would obviously be to have a variable fractional power to finely control and dial in any desired global sensitivity, but this really seems good enough.  I'll probably revisit this when most of the functionality goes to software.

It's an amazingly simple and efficient algorithm, I'm kind of shocked that it actually exists.  The universe is a weird place.

Hi Dewster,

That sim looks impressive! Not seen the Verilog (is this downloadable?) but looking at your .xls coding it looks like a quick routine easily to implement even with a small MCU - the sort of routine that could be done with one of the PSoC DSB ALUs, or certainly with the large dedicated "filter block" processor.

But I am going to dig my heels in (for a while anyway) , LOL ;-) .. My area of competence is analogue - would take me a year at least to get the level of competence with FPGA which would allow me to feel comfortable.. No point in trying to catch you up here!  - If I can manage to get to a level where I can fully understand what you are doing, thats enough for me - at least I can fully understand this latest! - I think the future for theremins may well rest in the hands of people who are competent in the analogue arts collaborating in development with people competent in the digital arts.

Its quite funny that you have a "sensitivity" switch! - I have just added this to my (now heavily modified) Lev oscillator - I found that by adding another winding to the tank transformer, I can increase the sensitivity - I have wound it so the oscillator is twice as sensitive, and have a SPCO relay to switch which tapping connects to the antenna circuit.

Fred

"Not seen the Verilog (is this downloadable?)"

Look for the file "square_root.v" in the zip file: http://www.mediafire.com/?dyyrzmdwf4s7bz8

"I think the future for theremins may well rest in the hands of people who are competent in the analogue arts collaborating in development with people competent in the digital arts."

When I'm feeling bold I like to think that's what we're doing here! :-)

If anyone is interested in digital design with in-depth explanations and code:

Altera has a cookbook available: http://www.altera.com/literature/manual/stx_cookbook.pdf

The Xilinx XAPPs are a real treasure trove: http://www.xilinx.com/support/documentation/application_notes.htm