Let's Design and Build a (mostly) Digital Theremin!

Posted: 12/7/2021 1:42:17 PM
Mr_Dham

From: Occitanie

Joined: 3/4/2012

"The Bourns Identity" - Dewster

Maybe they should change their name into "Bounce"...


They suggest an analog filtering in their datasheet, I often see some capacitors very close to the encoders in some other applications, would it be of any help here ?

Posted: 12/7/2021 2:17:07 PM
dewster

From: Northern NJ, USA

Joined: 2/17/2012

"They suggest an analog filtering in their datasheet, I often see some capacitors very close to the encoders in some other applications, would it be of any help here?"  - Mr_Dham

Good point!  But I don't believe so.  If you examine it, the analog filter has a double time constant (which I believe is mainly because it is entirely passive).  It pulls down at RC = 10k * 0.01uF = 0.1ms, but pulls up at RC = 20k * 0.01uF = 0.2ms.  The FPGA uses a linear 16 bit counter with hysteresis at the +/- 1/3 points and samples at 180MHz to give a roughly equivalent single time constant of 0.3ms.  So already the FPGA is filtering more.  Yesterday I altered the counter to weight low inputs 3x (~0.1ms) and it seems like it perhaps makes these ultra noisy encoders a bit better.  But that's not a real solution, almost nothing can withstand this kind of noise.  And weighting low inputs a lot heavier could introduce other issues if the lines are being perturbed by the electrostatic fields of the Theremin, so I'm a little hesitant to go beyond what the suggested analog filter does (biasing the filter RC timing biases the averaged noise level away from the center-based hysteresis points).

And, of course, crickets so far in response to my nastygram to Bourns.  I wonder if there are legal / financial liabilities to egregiously false datasheet specs / totally failing components?  Once soldered to a PWB, encoders are really tough components to replace.  Not to mention shipping back and forth, disassembly / reassembly of the entire product, etc. the costs and time involved can really skyrocket, and not to mention the black eye the product gets.  I should have stuck to the eBay no-name cheesers - some have worn out after a ton of use, but none ever failed right out of the factory tray.

Posted: 12/8/2021 3:54:23 AM
dewster

From: Northern NJ, USA

Joined: 2/17/2012

"Thanks dewster for links at the first page of this thread. Quick access is very handy. Truly, this topics is a kind of encyclopedia."  - ILYA

What a nice thing to say, thanks ILYA!  The index is in need of some updating...

"Experimenting with different polynomials, I have discovered the following thing.  Some polynomials, C0FEBABE for example , produces the flat spectrum curve even without the "whitening" filter."

This is completely unexpected!  I naively thought that LFSR output spectrum was a "thing" and that's it.  Nowhere have I read anything that would lead me to believe otherwise.  Though the Galois XORing seems like it would whiten things up much more than the single LSb (or MSb) flip (50% of the time) of the Fibonacci method.

The output sequences look qualitatively somewhat different.  I wonder if there are applications / instances where this difference might be apparent?  I'll have to try it out in the D-Lev code.

A code snippet is worth a million words!  So:
IF (MSb is set) : XOR with 0xE0000200, shift left, set the LSb
ELSE : shift left

It seems MSb(input) == LSb(output) is always true?  And after being tested, it seems MSb(input) is unused?  So the polynomial could be 0x60000200 with no difference in functionality?  If so, I believe you could check the sign to conditionally do the XOR with 0x60000200 (which would preserve the MSb), then use a left rotate instead of a shift to automatically generate the LSb?

Posted: 12/8/2021 2:35:50 PM
ILYA

From: Theremin Motherland

Joined: 11/13/2005

"So the polynomial could be 0x60000200 with no difference in functionality"

Truly so!

"then use a left rotate instead of a shift to automatically generate the LSb?"

Hmm, yes. This helps to save one instruction ("OR with constant"). Some C realizations (but not all) have the rotate operation as a library function.

Posted: 12/8/2021 3:25:13 PM
ILYA

From: Theremin Motherland

Joined: 11/13/2005

Of course,  this can easily be implemented  using native commands of CPU.

Dewster, you make all the DSP using software. Why not by hardware? Or partially by hardware , i.e. by custom units like "PRN generator", "Non-harmonic resonator",  "Chamberlin Unit" , etc?


Posted: 12/9/2021 11:32:04 AM
dewster

From: Northern NJ, USA

Joined: 2/17/2012

"Of course,  this can easily be implemented  using native commands of CPU." - ILYA

Yes, C becomes something of a middleman when doing this stuff, which is why I prefer Hive assembly - and Hive supports mixed signed / unsigned arithmetic operations which I find useful when doing DSP work.  Writing assembly with scoping and relative labels isn't too painful, and you can micromanage the hell out of it.

"Dewster, you make all the DSP using software. Why not by hardware? Or partially by hardware , i.e. by custom units like "PRN generator", "Non-harmonic resonator",  "Chamberlin Unit" , etc?"

Well, I kind of am using hardware because software is just a fancy way of multiplexing an ALU. :-)  The non-snarky answer is that multiplication in an FPGA is expensive and slow, so it doesn't pay to have separate units doing the same thing.  Also, Hive has 8 threads, which makes multiplexing anything trickier than single-threaded.  And functional units need register access, which is more complexity.  A lot of these functional blocks boil down to not much code or real-time, the Chamberlin filter is only 14 cycles:

Code:
// SVF_HP(0:in, 1:w, 2:d, 6:addr, 7:rtn | 0:hp, 6:addr) 
// 2nd order state variable high pass filter
// bp & lp are at mem locations
// signed I/O
// input address is NOT consumed 
// will overload if w & 1/d set too high
// some hf tuning deviation:
// w = 2 * sin(pi * Fc/Fs)
// w ~= 2 * pi * Fc/Fs
// Fc ~= w * Fs / (2 * pi)
// mem[s6]   := bp
// mem[s6+4] := lp
// 14 cycles max
@svf_hp {	s3 := mem[s6]	// get bp  ** SVF_HP() START **
	s3 *xsu= P2	// bp * d
	P0 -s= P3	// in - (bp * d)
	P0 := sat(s0)	// sat(in - (bp * d))
	s4 := mem[s6+4]	// get lp
	P0 -s= s4	// hp := in - (bp * d) - lp
	P0 := sat(s0)	// sat(hp)
	s0 *xsu= s1	// hp * w
	P3 +s= P0	// bp := bp + (hp * w)
	mem[s6] := s3	// sto bp
	P3 *xsu= P1	// bp * w
	P4 +s= P3	// lp := lp + (bp * w)
	mem[s6+4] := P4	// sto lp
	pc := P7 }	// RETURN =>  ** SUB END **

One of the biggest tricks to doing more with less is to studiously avoid time consuming math in real-time if at all possible.  I don't believe there is a single real-time inverse or division in the D-Lev code.

Posted: 12/9/2021 11:54:21 AM
dewster

From: Northern NJ, USA

Joined: 2/17/2012

ILYA, looking at your Galois image:

If you squint you can see sort of a bias towards negative peaks (many extend past the bottom of the viewing window, none on the top do).  There's an obvious visual asymmetry about the X axis where more & smaller positive values are favored, along with fewer and larger negative values.  I'm seeing this on the D-Lev too when I run the Galois noise generator, and I believe that makes it inferior for PWM use (I use the audio noise for LED tuner PWM).  Galois and Fibonacci LFSR are analogs of each other, but only if you use the serial output, not the parallel register data?  The whitening of the Galois seems to be just a function of the wide XOR going on there, which tends to scramble things more than the Fibonacci.  But it also seems to introduce some sort of bias in the peaks.  The bias can be removed (at least visually) with a whitening filter, but then you might as well be using the Fibonacci form?

Posted: 12/10/2021 2:10:49 PM
ILYA

From: Theremin Motherland

Joined: 11/13/2005

Discerning oservation! I had rewiew all the samples generated and found that this is a rule and not an exception. However I'm not a mathematician and dont know why this is happening. Alas.

Posted: 12/10/2021 3:14:53 PM
dewster

From: Northern NJ, USA

Joined: 2/17/2012

"However I'm not a mathematician and dont know why this is happening. Alas."  - ILYA

Perhaps it would somehow require a non-biased polynomial, but what can that be but maybe 0 which certainly wouldn't work.

Unlike mathematics, the beauty of engineering is you get to rule out stuff without having to prove exactly why you did so to the rest of the world.

Posted: 12/11/2021 10:48:44 PM
dewster

From: Northern NJ, USA

Joined: 2/17/2012

D-Lev Technology videos

Six new (lamer) videos:

1. Oscillators & coils : https://youtu.be/4M9qTMiDrBU
2. Antenna capacitance : https://youtu.be/PXX6-UuZDpM
3. The antenna near field : https://youtu.be/hAmqu3P3A1w
4. Antenna geometry : https://youtu.be/QKD_-7-jccM
5. Rod antennas : https://youtu.be/jUiM9MvHlGQ
6. Case ergonomics : https://youtu.be/Ib6ALO3SDUM

Trigger warning: I'm extremely opinionated about every little thing! ;-)

These took me a bunch of takes to figure out how to break the subject matter into a series of shorter videos. Too many "ums" "you knows" etc. vocal ticks, please excuse those, my mumbling delivery, and the glaring lack of formality / preparedness / polish.

Much of what is presented is covered in a more condensed form in the D-Lev manual. It's interesting covering the same material in different media.

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